Analog layout engineer

NO.432—【猎头职位：昆山需要一位  Analoglayout engineer】联系人：Grace-Tai,邮箱：hr@kthr.com，微信也可查询职位了！打开手机微信，搜号码“KTHR_COM”或查找微信公众帐号“KT人才”或扫描以上二维码即可添加，欢迎大家关注！Responsibilities：1.   Full custom analog layout/verification and RCextraction.2.   Perform blocklevel layout. Conduct physical verification (DRC and LVS using Cadence tools).3.   Team work with analog designers, optimizelayout.Basic Qualifications: 1.        Bachelor or above degreewith 3 years experiences in CMOS IC full-custom layout.2.        Experiences in Mixedsignal/analog/memory，etc.3.        Familiar with layoutskills and knowledge is must.4.        Goodteamwork/communication/positive is must.5.        Familiar with Cadence IClayout and verification tools6.        Having massive IP blockexperience7.        Familiar with ESD/Latchup/antenna and related layout solutions is a plus.8.        Familiar with rule deckis a plus.福利：五险一金、带薪年假、公司股权激励等，博士优秀人才可申请政府人才计划补贴