上海需要一位 SoC Designer Engineer(IP or Integration)

2016年06月02日 17:10    发布者:KT咨询
【猎头职位:上海需要一位 SoC Designer Engineer(IP or Integration)】联系人:Jessy-He,邮箱:hr@kthr.com,微信也可查询职位啦!打开手机微信,搜号码“KTHR_COM”或查找微信公众帐号“KT人才”或扫描以上二维码即可添加,欢迎大家关注!Job Description:1、System integration;2、Simulation and verification of functionalities at both module and chip level;3、DFT strategy and implementation;4、ATPG pattern generation and validation;5、Synthesis and timing closure.
Requirements:1、At least 5-year experience of digital design experience;2、Familiar with DFT flow (mentor DFT flow is a plus);3、Strong skills of Verilog RTL coding, verification and debug; Hands on experience in EDA tools such as Cadence NC-Sim, Synopsys DC, PT, etc;4、Solid knowledge of documentation of design report;5、Ability to work well with teammates.