Logic Synthesis and Verification Algorithms

2010年07月08日 10:36    发布者:techieboy
Logic Synthesis and Verification Algorithms
By Gary D. Hachtel, Fabio Somenzi

Publisher:   Springer
Number Of Pages:   564
Publication Date:   2006-02-10
ISBN-10 / ASIN:   0387310045
ISBN-13 / EAN:   9780387310046
Binding:   Paperback

Book Description:

Logic Synthesis and Verification Algorithms blends mathematical foundations and algorithmic developments with circuit design issues. Each new technique is presented in the context of its application to design. Through the study of optimal two-level and multilevel combinational circuit design, the reader is introduced to basic concepts, such as Boolean algebras, local search, and algebraic factorization.

Similarly, through the study of optimal sequential circuit design, the reader is introduced to graph algorithms, finite state systems, and language theory. Throughout the book, recurrent themes such as branch and bound, dynamic programming, and symbolic implicit enumeration are used to establish optimal design principles.

Circuit designers and CAD tool developers alike will find Logic Synthesis and Verification Algorithms useful as an introductory and reference text. The rich collection of examples and solved problems make this book ideal for self study.
Because of its careful balance of theory and application, Logic Synthesis and Verification Algorithms will serve well as a textbook for upper division and first year graduate students in electrical and computer engineering.

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网友评论

rp006 2011年02月20日
thanks for sharing!
rp006 2011年02月20日
i found parts of the compressed book were downloaded different times, which is really funny.
rp006 2011年02月20日
without downloading all the parts, the book would not be extracted.
jimcmwang 2019年06月03日
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